Hardware Engineer | RTL, Embedded Systems & Circuit Design

UC Irvine EE student (Semiconductors & Optoelectronics) building FPGA cores, embedded firmware, and PCBs. Currently interning in hardware validation at Revvo AI.

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About

Hi! I'm Pranav, a second-year Electrical Engineering student at UC Irvine specializing in Semiconductors & Optoelectronics. I work as a Hardware Validation Intern at Revvo AI and as a Hardware/Software R&D Engineer at UCI's HERO Lab, where I split my time between analog circuit design and embedded firmware. Outside of that, I like building things from scratch to understand them better, from RISC-V processors in Verilog to custom PCBs and embedded sensor projects.

Skills

Hardware

Verilog/RTLAdvanced
RISC-VAdvanced
Circuit AnalysisAdvanced
SolderingAdvanced
VivadoIntermediate
OscilloscopeIntermediate
FPGAIntermediate
Schematic CaptureIntermediate
I2C / UART / SPIIntermediate
LTSpiceIntermediate

Software

PythonAdvanced
CAdvanced
C++Intermediate
GitAdvanced
KiCadIntermediate
AltiumIntermediate
SystemVerilogIntermediate
AssemblyIntermediate
MATLABIntermediate
LinuxIntermediate
GDBBeginner
Tcl / MakeBeginner

AI/ML

PyTorchIntermediate
ONNXIntermediate
NumPyIntermediate
OpenCVIntermediate
MediaPipeIntermediate
PhysNet / DeepPhysIntermediate
LangGraphBeginner

Experience

Hardware Validation Intern — Revvo AI

San Mateo, CA | June 2026 – Present

Reviewed schematics and PCB designs for a battery-powered wireless sensor node, catching pre-fabrication issues before they became field failures
Built an automated test framework in Python interfacing with an oscilloscope, JLink, and programmable power supply, cutting manual bench-characterization time significantly
Validated hundreds of wireless tire-health sensor units daily across RF, threshold, and firmware checks to certify units for field deployment

Hardware/Software R&D Engineer — HERO Lab, UC Irvine

Irvine, CA | March 2026 – Present

Designed the analog front-end for a grant-funded contactless heart-sound sensing system, building a multi-channel MEMS microphone array for capturing weak cardiac signals
Built a sensor-fusion algorithm that weights each microphone by SNR and distance to reconstruct clean heart-rate signals, prototyped in Python and ported to embedded firmware
Optimized deep learning models like PhysNet and DeepPhys for edge deployment through ONNX quantization, balancing model size, latency, and compute efficiency

Embedded Systems Developer — Open Project Space

Irvine, CA | September 2025 – May 2026

Built an ultrasonic proximity-triggered trash can with sub-100ms response time using interrupt-driven distance sensing in Embedded C
Designed servo actuation sequences driven by real-time ultrasonic readings, calibrating PWM control for repeatable mechanical motion
Soldered and built 7+ embedded hardware projects, debugging GPIO and UART interfaces for stable, fault-free operation

Portfolio

Vivado simulation waveform showing clock, reset, and register values across processor cycles

Single-Cycle RV32I Processor

Designed and verified a 9-module single-cycle RISC-V (RV32I) processor in Verilog, supporting R-type, I-type, load, and store instructions. Built a custom 32-bit ALU, synchronous register file, and full datapath, verified through a self-written Vivado testbench with cycle-accurate waveform analysis. Currently being extended into a pipelined, hazard-resolved core with SystemVerilog verification.

Verilog
RISC-V
RTL Design
Vivado
Computer Architecture

GitHub

Prototype build with the trash can lid open, driven by a breadboarded ultrasonic sensor and servo

Ultrasonic Proximity-Triggered Trash Can

Built a touchless trash can using an HC-SR04 ultrasonic sensor with interrupt-driven echo timing, achieving sub-100ms lid response across a calibrated 0–30cm range. Designed servo actuation logic in Embedded C with a non-blocking auto-close timer, tested across 50+ repeatable cycles.

Embedded C
ESP32
Interrupt-Driven
Sensors
PWM

GitHub

Glowing LED and resistor on a breadboard wired to an ESP32 development board

illustrative

Optical Material Classifier (ClimaCorre)

Designed a mixed-signal circuit using an RGB LED and photodiode sensing to differentiate plastic types (HDPE vs. PET) by wavelength-dependent reflectance, across 2+ functional prototypes. Built the analog capture chain feeding an ESP32 for real-time signal processing, emitting an optical signature for classification.

Mixed-Signal Circuit
ESP32
Photodiode Sensing
Optical Sensing

GitHub

16x2 LCD display node showing live temperature and humidity readings from the sensor node

WiFi Weather Station

Built a two-node ESP32-C3 weather monitor: a sensor node reads temperature, humidity (AHT20, ±0.2°C/±2% RH), and ambient light, then transmits live readings over WiFi to a separate display node running a 16x2 I2C LCD, refreshing every 10 seconds for a stable readout.

ESP32
WiFi
IoT
I2C
Sensors

GitHub

Welch power spectral density plot with the detected heart-rate peak marked at 90.1 BPM

Real-Time rPPG Vitals Pipeline

Built a real-time rPPG (remote photoplethysmography) pipeline in Python using MediaPipe facial landmark detection and Fourier-based signal processing to extract heart rate from video, validated against 100+ patients from the UBFC dataset. Trained and benchmarked PhysNet and DeepPhys models in PyTorch for vitals emulation.

Python
PyTorch
Signal Processing
Computer Vision
MediaPipe

GitHub

Finished FM/AM radio in a clear acrylic case with a lit seven-segment frequency display and four-button interface

Hand-Soldered FM/AM Radio

Hand-soldered a fully functional FM/AM radio from 20+ discrete components and ICs around an RDA5807 tuner, covering the full FM (87.5–108 MHz) and AM (530–1700 kHz) broadcast bands with a 4-button volume and tuning interface. Built end-to-end from multi-page schematics — component selection through board bring-up — debugging reception failures down to cold joints and grounding faults with a multimeter.

Analog Circuits
RF
Soldering
RDA5807
Schematic Reading

GitHub